PHY6252 — Ultra Cost-Effective Bluetooth 5.2 / 2.4G SoC
The PHY6252 is a high-performance, ultra-low-power Bluetooth 5.2 SoC built around a 32-bit processor. It offers 64 KB retention SRAM, 512/256 KB Flash, 96 KB ROM, 256-bit eFuse, and supports secure OTA updates. With rich peripherals and integrated application IP, it enables full-featured products with the lowest possible BOM.
Ideal for wearables, beacons, smart home/building, health/medical, industrial, retail/payment, data transmission, PC/mobile/TV peripherals, and general IoT.
Key Features
High-performance low-power 32-bit CPU
Memory: 512/256 KB SPI Flash | 64 KB SRAM (fully retained in sleep) | 96 KB ROM | 8 KB Cache | 256-bit eFuse
19 GPIOs (wake-capable, interrupt-capable), 3× QDEC, 6× PWM, 2× PDM/I²S/SPI/UART, 4-ch DMA
Digital + analog MIC input with low-noise PGA
5-ch 12-bit ADC, 6× 32-bit timers + watchdog, RTC
Power: 1.8–3.6 V, battery monitor
Ultra-low power:
0.3 µA OFF (IO wake)
1 µA sleep + RTC
13 µA sleep + RTC + full SRAM retention
RX: 8 mA | TX: 8.6 mA @ 0 dBm | MCU: <90 µA/MHz
Bluetooth 5.2:
2 Mbps PHY, data length extension → up to 1.6 Mbps throughput
AoA/AoD direction finding
Full BLE Mesh (Friend / LPN / Proxy / Relay)
–99 dBm @ 1 Mbps | –105 dBm @ 125 kbps
TX power –20 to +10 dBm (3 dB steps)
Single-pin antenna (no matching or TX/RX switch)
Optional external PA/LNA control
AES-128 hardware encryption, link-layer offload, hardware random number generator
Temperature: –40 °C to +85 °C
Package: RoHS-compliant SSOP24



